SOI wafers
(silicon-on-insulator)
A silicon-on-insulator substrate is a three-layer package consisting of a monolithic silicon wafer, dielectric and a thin surface layer of silicon embedded on it. The dielectric can be silicon dioxide SiO2 or, much less frequently, sapphire (in this case, the technology is called "silicon on sapphire" or SOS). Further production of semiconductor devices using the resulting substrate is essentially the same as the classical technology, where a monolithic silicon wafer is used as a substrate.
The main application of SOI technology is in digital integrated circuits (especially in microprocessors), most of which are currently performed using CCL (complementary control logic on MOS transistors). With such a circuit, most of the power consumption is spent on charging the stray capacitance of the isolating junction at the moment the transistor switches from one state to another, and the time spent for this charge determines the overall speed of the circuit.
The main advantage of the SOI technology is that due to the thinness of the surface layer and the isolation of the transistor from the silicon base it is possible to reduce the parasitic capacitance many times, and this way to reduce the charging time together with the power consumption.